1. Field of the Invention
This invention relates to the field of buffering data transaction requests. More particularly, this invention relates to the buffering of data transaction requests in a system in which at least some of the data transaction requests are managed so as to provide a lower latency in their servicing.
2. Description of the Prior Art
It is known to provide buffers for receiving data transaction requests. Such buffers may be placed at various positions within a system, such as, for example, at the input to a memory or the input to an I/O device. Such buffers may be configured to receive and store data transaction requests sent over communication circuitry, such as interconnect circuitry within a system-on-chip integrated circuit, and then pass the received and stored data transaction requests to their destination when this is able to receive the data transaction requests. Providing such buffers has various advantages, such as avoiding congestion in the communication mechanisms which transmit the data transaction requests as the transmission may be completed by receipt of the data transaction request into the buffer thereby freeing the communication circuitry to perform other communication tasks. Such buffers may also be used to increase the efficiency of utilisation of the target device to which the data transaction requests are directed.
It is known to provide systems in which data transaction requests may be treated differently depending upon their latency or other requirements. It is desirable that the buffering of data transaction requests should be performed in a manner which is suitable for low circuit overhead and low power consumption implementation and yet permits data transaction requests associated with low latency requirements to be serviced with low latency. Furthermore, such buffering should not allow circumstances to arise in which data transaction requests which are not low latency data transaction requests become starved of processing and are held for an undesirably long time behind low latency data transaction requests that are given undue priority. Furthermore, the buffering system should desirably make good use of its bandwidth and other capabilities whatever the mix between low latency data transaction requests and data transaction requests which are not low latency data transaction requests.